FortiGate-7121F fast path architecture
The FortiGate-7121F chassis schematic shows the communication channels between chassis components including the SMMs (MGMT1 and MGMT2), the FIMs (FIM1 and FIM2), and the FPMs (FPM3 to FPM12).
By default, MGMT2 is the active SMM and MGMT1 is inactive or passive. The active SMM always has the Intelligent Platform Management Bus (IPMB) address 0x20 and the passive SMM always has the IPMB address 0x22. Active and passive refers to the SMM that is controlling the chassis. The MGMT interfaces and console ports on both SMMs are always available.
Each FIM and FPM and the SMMs have a Shelf Management Controller (SMC). These SMCs support IPMB communication between the active SMM and the FIMs and FPMs and other chassis components for storing and sharing sensor data that the SMM uses to control chassis cooling and power distribution. The FortiGate-7121F also includes serial communications to allow console access from the SMM to all FIMs and FPMs.
The base backplane includes 1Gbps ethernet management connections between the SMMs and the FIMs. The base backplane also supports 50Gbps Ethernet communication for management and heartbeat communication between FIMs and FPMs.
FIM1 and FIM2 (IPMB addresses 0x82 and 0x84) are the FIM interface modules in slots 1 and 2. FIM data interfaces connect the chassis to data networks. NP7 processors in the FIMs use session-aware load balancing (SLBC) to distribute data sessions over the FIM Integrated Switch Fabric (ISF) to the 10x400Gbps connections over the fabric backplane to the FPMs. Data communication between FIM1 and FIM2 occurs over a 1TB fabric connection.
The FIM 1Gbps MGMT1 and MGNT2 interfaces are used for Ethernet management access to chassis components. The 2x100Gbps M1 and M2 interfaces are used for HA heartbeat communication between chassis. The 2x25Gbps M3 and M4 interfaces are used for remote logging or other management functions.
FPM3 to FPM12 (IPMB addresses 0x86 to 0x98) are the FPM processor modules in slots 3 to 12. These worker modules process sessions distributed to them over the fabric backplane by the NP7 processors in the FIMs. FPMs include NP7 processors to offload sessions from the FPM CPU and CP9 processors that accelerate content processing. FPMs also include data interfaces that increase the number of data interfaces supported by the FortiGate-7121F. Data sessions received by the FPM data interfaces are sent over the fabric backplane to the FIM NP7 processors to be load balanced back to the FPMs using SLBC.
The FPM 1Gbps MGMT interfaces are used for Ethernet management access to chassis components.