FortiGate 200E and 201E fast path architecture
The FortiGate 200E and 201E include two SOC3 NP6XLite processors. The SOC3 CPUs and CP9Lite processors are not used. Instead, the FortiGate 200E and 201E architecture includes separate CPU resources and a standard CP9 processor. Because this model does not include a switch fabric, you cannot create Link Aggregation Groups (LAGs) or redundant interfaces between interfaces connected to different NP6Lites. As well traffic will only be offloaded if it enters and exits the FortiGate on interfaces connected to the same NP6Lite.
The NP6Lites are connected to network interfaces as follows:
- NP6Lite_0 is connected to six 1GE RJ-45 interfaces (port9-port14) and four 1GE SFP interfaces (port15-18).
- NP6Lite_1 is connected to ten 1GE RJ45 interfaces (wan1, wan2, port1-port8).
The following diagram also shows the RGMII and QSGMII port connections between the NP6Lite processors and the front panel interfaces. Both RGMII and QSGMII interfaces operate at 1000Mbps. However, QSGMII interfaces can also negotiate to operate at lower speeds: 10, 100, and 1000Mbps. To connect the FortiGate 200E to networks with speeds lower than 1000Mbps use the QSGMII interfaces (port1-8 and port11-18).
You can use the following get command to display the FortiGate 200E or 201E NP6Lite configuration. You can also use the diagnose npu np6lite port-list command to display this information.
get hardware npu np6lite port-list
Chip XAUI Ports Max Cross-chip
Speed offloading
------ ---- ------- ----- ----------
np6lite_0
2 port9 1000M NO
1 port10 1000M NO
4 port11 1000M NO
3 port12 1000M NO
6 port13 1000M NO
5 port14 1000M NO
9 port15 1000M NO
10 port16 1000M NO
8 port17 1000M NO
7 port18 1000M NO
np6lite_1
2 wan1 1000M NO
1 wan2 1000M NO
4 port1 1000M NO
3 port2 1000M NO
6 port3 1000M NO
5 port4 1000M NO
8 port5 1000M NO
7 port6 1000M NO
10 port7 1000M NO
9 port8 1000M NO