On the FortiGate-VM, a DPDK engine is attached to an IPS engine, which shares the same process and is mapped to a CPU. A processing pipeline of four stages handles a packet from RX to TX:
- DPDK RX
- DPDK TX
You can freely determine the CPUs enabled for each pipeline stage by running the following commands:
config dpdk cpus
set [X] [Y]
Here X is one of the pipeline stages:
Y is a string expression of CPU IDs, which contains comma-delimited individual CPU IDs or ranges of CPU IDs separated by a dash.
The example enables CPUs 0, 2, 4, 6, 7, 8, 9. 10, and 15 to run the vNP pipeline stage:
set vnp-cpus 0,2,4,6-10,15
You must enable at least one CPU for each pipeline stage. Otherwise, DPDK early initialization fails.